1. Field of the Invention
This invention relates to a semiconductor integrated circuit device and, in particular, to a multi-layer device composed of a plurality of semiconductor chips.
2. Description of the Related Art
FIG. 8 is a perspective view of a conventional semiconductor device. The device shown comprises a package 81 and an LSI chip 82 contained therein. The LSI chip 82 has on its surface a multitude of electrode pads 83, the package 81 having a multitude of pins 84, each corresponding to an electrode pads 83. Each of the electrode pad 83 of the LSI chip 82 is electrically connected to the corresponding pin 84 through a wire 85.
In operation, the pins 84 are electrically connected to a circuit outside this semiconductor device so that input signals from an external circuit are transmitted through the pins 84 and the wires 85 to the electrode pads 83 of the LSI chip 82. On the other hand, output signals from the LSI chip 82 are output through the electrode pads 83, the wires 85 and the pins 84 to the external circuit.
When a plurality of LSI chips are used in a conventional semiconductor device constructed in this way, a plurality of packages 81 containing respective LSI chips 82 are arranged on a single substrate, and electrical connections between the packages 81 and between the semiconductor device and the external circuit are effected through the pins 84. As a result, the mounting of the packages 81 requires a large area, which leads to an increase in the size of the equipment in which such semiconductor devices are used.
Even if LSI chips 82 are used without being housed in packages 81, the problem of the large area required for their mounting will remain since a plurality of LSI chips 82 will then inevitably have to be arranged in one plane.